ASIC Design Engineer Interview Questions |

ASIC Design Engineer Interview Questions


ASIC design engineer interview questions shared by candidates

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using a simple logic gate, convert a SET type flop to a RESET type flop

3 Answers

add inverter to D input as well as Q output of the flop

At the input of D give S_bar*D signal. Where S is the set signal.

Qnew = Qorig * Set_Bar

Psychological and Analytic questions would take a conscious presence of mind to go through, The question includes technical knowledge with twists

1 Answer

Asked to design a FSM

1 Answer

Mainly focused on Low power as I said I am interested in low power. Asked about timing analysis STA setup hold and synthesis. Some basic rtl design with verilog vhdl.Basic CMOS modeling NAND gate and NOR gate. IN HR round as i was fail in one of the subject was asking about that subject but as i performed well they consider that.

1 Answer

Fifo depth calculation 80/10 and 8/10.

1 Answer

Interview Questions

1 Answer

IO Budget / Timing: Since I was out of touch on this topic, I was not very well prepared on this. But I think I handled it well Also, was surprised to see a question like: How many ping pong balls would you need to fill up a 20X20 meeting room? etc. The idea was to see more on how I'd approach the problem and not necessarily give the right answer.

As per market Standard.

1 Answer

Explain functioning of different types of memory cells.

Questions 1st technical interview: Talk about yourself Talk about your project networks problem from question paper how does the power supply at home work between two to three rooms Flip flops timings questions frequency of 11 inverters in series detailed questioning of NMOS structure operations functioning secondary effects probe into channel length modulation CMOS inverter switching power there, static power and dynamic power formula logical puzzle:consider 2 taps (tap a and tap b) as inputs AND gate OR gate and XOR gate then take the same logic and build a water tank, locate the taps so that the functionality of the gates hold good Questions I got wrong in the question paper Resume-based questions

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