Senior asic design engineer Interview Questions
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senior asic design engineer interview questions shared by candidates
Top Interview Questions
Complete interview was based on Verilog and Digital Electronics There were three interview rounds one technical,one managerial(which people say ) (especially covering the resume)and third HR round |
Problem on timing analysis |
varies and based on JD |
clock tree synthesis |
IO Budget / Timing: Since I was out of touch on this topic, I was not very well prepared on this. But I think I handled it well Also, was surprised to see a question like: How many ping pong balls would you need to fill up a 20X20 meeting room? etc. The idea was to see more on how I'd approach the problem and not necessarily give the right answer. |
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