AMD Design Verification Engineer II interview questions
Updated 28 Dec 2016
based on 1 rating
Difficulty
Average
Experience
Very positive
How others got an interview
100%
In person
In person
Interview search
1 interviews
AMD interviews FAQs
Design Verification Engineer II applicants have rated the interview process at AMD with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 72.4% positive. This is according to Glassdoor user ratings.
Common stages of the interview process at AMD as a Design Verification Engineer II according to 1 Glassdoor interviews include:
One on one interview: 100%
Here are the most commonly searched roles for interview reports -
I applied in-person. I interviewed at AMD (Bengaluru) in Jun 2012
Interview
3 technical rounds with different aspect of digital design , verification, system verilog, OOPS concept,
USB3.0
Perl, C and UVM
Given to solve may circuit problems.
Manager and Director interview happened separately
How to code xor gate with multiplexers.
How to code xor gate with multiplexers.
How to code xor gate with multiplexers.How to code xor gate with multiplexers.How to code xor gate with multiplexers.
Interview questions [1]
Question 1
Core Digital
Perl, C and UVM
Given to solve may circuit problems
How to code xor gate with multiplexers.