It was a technical interview. The interviewer was a team leader. He asked questions about current mirror, source follower, RC circuits, oscillators and PLL. Besides, he asked some questions about the projects from CV.
I applied online. The process took 4 months. I interviewed at AnSem (Duisburg) in Jul 2021
Interview
There were two rounds of interviews. In the first round, I was interviewed by one Frontend Manager and one Backend Manager. The Frontend person was too judgmental about any statement I was making. The Backend person was rather composed and constructive.
In the second round the interviewer was a senior technical person from Germany. He had very thorough knowledge of VHDL whereas I mostly worked with Verilog. Though the discussion was reasonably good, but I was expecting more logical questions rather than HDL constructs. One can hardly judge a doctoral candidate with such questions after all I did not do my PhD in VHDL.
I had to wait for 3 months for the feedback. Of course I did not get the job.
