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      Analog Bits

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      Entry Level CMOS Mixed Signal Circuit Design Engineer Interview

      14 Mar 2015
      Anonymous interview candidate
      Sunnyvale, CA
      Declined offer
      Neutral experience
      Easy interview

      Application

      I applied online. The process took 1 day. I interviewed at Analog Bits (Sunnyvale, CA) in Feb 2015

      Interview

      My phone interview only took 15 minutes. Before the phone interview, you need to take a look at the frequently asked questions on glassdoor. Basically, PMOS and NMOS pass transistor logic, open source voltage, an inverter with resistor feedback, an inverter whose vdd is connected with an inductor. At the end of interview, I was told to invited to an onsite interview. Being a small company, Analog bits is not generous about onsite trip. You will be only allowed to fly with Southwest airline with cheapest tickets, and this can be the reason why your interview can be arranged at 3 weeks after your phone interview. The onsite interview questions are very basic, and the decision, in my case, is given in just a week, but the written offer is extended 3 weeks later when another offer kicked in, so I declined the offer from Analog bits. The advantage of the offer from the Analog bits is only high base salary. No relocation fees, no 401K. Moreover, Analog Bits doesn't seem to want to have me in its team so I used its offer to ask for a salary raise in my second offer :)

      Interview questions [1]

      Question 1

      These are my onsite interview questions and some of them is related to my resume. 1. Given a chain of inverter, size the gates and calculate the delay; 2. Given an optimization goal, resize the chain of inverter, and recalculate the delay; 3. Given a typical 6T-SRAM, described how read and write work. Suppose we only have on access transistor but need to realize the read and write, how do you design the another access transistor? Both in analog and digital ways; 4. Given a simple charge pump circuit, figure out the waveform at certain nodes; 5. Given a ideal op-amp and 2 resistors with same value, draw the circuit gain of -1, 1 and 0.5, and in the third case, make sure that the input resistance is infinity; 6. Given a 50%-duty cycle waveform, draw the 33%-duty cycle waveform (division by 3), and draw the FSM state diagram to realize the division by 3; 7. Given a transmission line and a source with an adjustable resistance. If the load resistance of the transmission line is given, figure out the source resistance to make sure that the load has the maximum load power. If the transmission line is open on one end and connect an ideal current source at the other end, draw the voltage waveform at the output of the current source; 8. Given a rc high-pass filter and apply an input voltage step and take the output voltage from resistor, draw the voltage waveform of the resistor, and explain the waveform about its peak and rc time constant; 9. Given a self-bias amplifier with two logic inputs and one output, figure out the logic functions; 10. If the channel length of a device is cut down by 1/2, how does the unity-gain frequency change? Hint: Long and short channel devices are different; 10. Given a cs-amplifier with source degeneration (the classical continuous-time linear equalizer circuit), solve for the transfer functions, given the relative time constant positions, draw the bode plots, mainly about phase, explain why phase is positive and if this is contradictory to causality; 11. Given a 2-input nor gate, size the gate with equal rise and fall time, find out the faster input and explain why; 12. In high speed IO, why are the both Tx and Rx termination resistors matched with the characteristic impedance of the transmission line? 13. Describe your favorite project on your resume; 14. Draw the schematic of a PMOS, given the voltages of 4 terminals, and figure out the operation region of PMOS. Figure out the the output voltage of a cascaded PMOS circuit; 15. A transistor with its source connected a capacitor, apply a DC voltage at the drain, and figure out the voltage waveform of the capacitor; If you aced most of the technical questions, you are very likely to invited to be shown around the company, and then you will have the behavioral interview: 1. Tell me about yourself, like your past experience in middle school. 2. Tell me what you like about Analog Bits (usually after showing around the company). 3. What's your expectation of salary? 4. What's your hobbies? 5. Do you like your school and why? 6. When can you start? 7. If Analog Bits gives you an offer today and you get another offer from Broadcom and Qualcomm tomorrow, which one do you choose? 8. What do you see yourself in your career? 9. Give me two references.
      2 Answers
      17

      Other Entry Level CMOS Mixed Signal Circuit Design Engineer interview reviews for Analog Bits

      Entry Level CMOS Mixed Signal Circuit Design Engineer Interview

      28 Sept 2020
      Anonymous interview candidate
      No offer
      Neutral experience
      Easy interview

      Application

      I applied online. I interviewed at Analog Bits

      Interview

      Applied online, got an email from HR to schedule the skype interview. Interview was straightforward and questions were pretty much from glassdoor. Kept pushing them to speed up the process since I already had an offer but didnt hearback after the interview though

      Interview questions [1]

      Question 1

      How to convert a Nand gate to OR gate.
      Answer question

      Entry Level CMOS Mixed Signal Circuit Design Engineer Interview

      21 Feb 2015
      Anonymous interview candidate
      No offer
      Negative experience
      Average interview

      Application

      I applied online. The process took 3 days. I interviewed at Analog Bits in Feb 2015

      Interview

      HR Email me first, ask for unofficial transcripts. Then HR call to set up phone interview on the next day. A technician with India accent phone interviewed me. This is my first phone interview.

      Interview questions [1]

      Question 1

      At first device, NAND, NOR gates, I am fine. But later mostly digital, I forget those latches, flip-flop. It is easy, but I am not well prepared. This is my first phone interview.
      Answer question
      1

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