Design Verification Engineer applicants have rated the interview process at Atria with 2 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 100% positive. This is according to Glassdoor user ratings.
Here are the most commonly searched roles for interview reports -
start with self intro, then simple interview with basic questions on digital and Verilog, sv constraints, assertions, uvm. mostly differences and deep knowledge on points you explain have to be take care.
Interview questions [1]
Question 1
Differences btwn flip-flop and latch with timing diagram