Phone interview questions were about yourself, current job role, why this position, how can you relate to this position, the difference between a latch and FF, NMOS working, 3 NMOS in series(calc output voltage across 3rd NMOS) and a few more basic device physics question. Onsite interview was divided into 4 rounds. First round with a panel of 3, about 3-d cross-point memory, it working(as it was for 3-D cross point PE), logic questions, C code based Qs(recursion), about my present project(SerDes Rx blocks), how to validate a particular block in the SOC, when u can't control the design parameters. Validation and verification concepts(I'm more into design engineering background, so I couldn't answer validation/verification concepts), logic Qs, programming(recursion) with address shift(LSB) nmos working. Later lunch with senior engineer with regular Qs about my experience and background. Next, another 3 people panel interview more into technical, Id wrt to Vgs for NMOS, decoder circuit design(digital circuit design, boolean expression, realizing AND gate based circuit), a transmission gate(advantage over NMOS), current mirror and load resistor on both sides R and 100R of it, how to validate it and a few more basic Qs which were more into verification/validation perspective.