Palo Alto Networks ASIC Design Verification Engineer Interview Questions

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ASIC Design Verification Engineer Interview

20 Mar 2025

Anonymous interview candidate

No offer

Positive experience

Easy interview

Application

I applied online. The process took 2 weeks. I interviewed at Palo Alto Networks in Feb 2025

Interview

I applied online. Got a call from HR to know about the basic details .First round of technical interview was with Team Lead it is a 1 hr virtual interview.

Interview questions [1]

Question 1

Calculate bandwidth for 16 bit data bus, data rate: 50 MHz and only 25% of time.

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ASIC Design Verification Engineer Interview

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ASIC Design Verification Engineer Interview