ASIC Design Verification Engineer applicants have rated the interview process at AIonSi with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 100% positive. This is according to Glassdoor user ratings.
Common stages of the interview process at AIonSi as a ASIC Design Verification Engineer according to 1 Glassdoor interviews include:
I applied online. I interviewed at AIonSi (Bengaluru) in Jan 2024
Interview
2 round
Both are technical
They will ask random digital verilog system verilog uvm questions
And assertions also
First round was quite simple second round is having medium to tough questions
Interview questions [1]
Question 1
Array, system verilog,uvm, mailbox
Queue fifo configdb etc