Vlsi engineer Interview Questions
vlsi engineer interview questions shared by candidates
Top Interview Questions
Difrence between synchronous and asynchronous Dint say In asynchronous ckt, the output does not depends on clock, it depends on the reset of the device only |
1) Be prepare on basics of logic design---FF,counter,adder,subtractior,Decoder |
function to count the number of ones in system verilog |
They took my for an hour plus 15mins on various electonics topics . Starting from Basic electronics to digital electronics and finally my final year project. |
5: universal gates |
General digital electronics and VERILOG questions. |
Basic questions on Digital and C language. |
Given a Hardware structure having two gates requiring the same clock pulse.....how do they need to be connected? |
write a verilog code for half adder, decoder, design the circuit for clock edge detector when input d is high with one delay, and other basic questions about cmos. |
5 years goal |