Qualcomm Digital Design Engineer Interview Questions | Glassdoor.co.in

Qualcomm Digital Design Engineer Interview Questions

Interviews at Qualcomm

20 Interview Reviews

Experience

Experience
72%
11%
17%

Getting an Interview

Getting an Interview
57%
19%
12%
12

Difficulty

3.2
Average

Difficulty

Hard
Average
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Helpful (1)  

Digital Design Engineer Interview

Anonymous Interview Candidate in San Diego, CA (US)
No Offer
Positive Experience
Difficult Interview

Application

I applied online. I interviewed at Qualcomm (San Diego, CA (US)).

Interview

Excellent experience. Paid trip to SD for interview and all the things taken care of. Hiring managers were considerate and respectful. Interview lasted for six hours with five interviewers to meet in a row.

Interview Questions

  • Sequential timing setup and hold times definition and understanding   Answer Question

Other Interview Reviews for Qualcomm

  1. Helpful (2)  

    Digital Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. I interviewed at Qualcomm.

    Interview

    Referred and applied online. Phone interview. The interviewer was super nice. Ask a little about my experiences (What's difference between Design Compiler & PrimeTime) and several design problems. I received on-site interview after it. The process has not finished yet.

    Interview Questions

    • Cross clock domain synchronizer, 1 bit.   1 Answer
    • Sequence detector   1 Answer

  2.  

    Digital Design Engineer Interview

    Anonymous Interview Candidate in San Diego, CA (US)
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took 2+ months. I interviewed at Qualcomm (San Diego, CA (US)) in November 2017.

    Interview

    The HR contacted me for the interview. It took two weeks to almost schedule the phone interview. The phone interview had some questions regarding FIFOs. Next, was the onsite interview which had 6 rounds including lunch. The topics included digital design using flip-flops, about SPI interface, Files used in EDA Tools, DFT, Low-power design, Verilog, and ASIC flow.

    Interview Questions

    • More questions in CDC, Constraints used in SDC and about Primetime report.   Answer Question
  3. Helpful (1)  

    Digital Design Engineer Interview

    Anonymous Interview Candidate in College Station, TX (US)
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 1 day. I interviewed at Qualcomm (College Station, TX (US)) in September 2016.

    Interview

    I applied online and got the call for a phone screen very soon. The position was for a Digital Design Engineer. They were looking for person with knowledge in DSP.

    Interview Questions

    • Mostly on digital design like what is CDC and what are the stops to solve them.
      Some questions focused on DSP concepts like a transceiver architecture, IIR and FIR filters, their relative advantages, disadvantages etc.   Answer Question

  4. Helpful (4)  

    Digital Design Engineer Interview

    Anonymous Employee in Raleigh, NC (US)
    Accepted Offer
    Positive Experience
    Difficult Interview

    Application

    I applied online. The process took 2+ months. I interviewed at Qualcomm (Raleigh, NC (US)) in March 2015.

    Interview

    Phone interview followed by on-site three weeks later. They were designing their own transaction protocol based on the AMBA AXI/ACE spec. I was fortunate to have studied the same for two months for directed research under a professor. I could tackle AXI questions. Interview went well. Didn't nail it but not too bad. Got a verbal offer three weeks later. Got the formal letter 1.5 weeks after the verbal.

    Few details:
    1. Had interview with three panels consisting of 2-4 members each.
    2. Questions on bus architecture, synthesis, protocols, verilog, and certain design problems.
    3. 1 major design question by each panes, takes 15-20 mins to solve; related to logic design--flip-slops, decoders, etc.

    Interview Questions

    • What are the channel in AXI and ACE? What is cache coherency?   1 Answer
    • Design a variable size decoder in Verilog.   2 Answers
    • DDR2 initialization engine synthesis issues (from my resume).   Answer Question

    Negotiation

    Tried to negotiate, but they denied my request suggesting they have standard packages for New Graduates. However, the pay is higher than the industry standard so not a big issue.


  5. Helpful (1)  

    Digital Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Neutral Experience
    Average Interview

    Application

    I applied online. The process took 4+ weeks. I interviewed at Qualcomm.

    Interview

    Starts with a phone interview followed by an onsite interview. Interview is neither complex nor easy. Mainly fundamental Digital Design Questions

    Interview Questions

    • I got lot of questions on async designs. Was surprised since was a new grad when I interviewed at Qualcomm, however were not that diffcult to answer. Was surprised there was very little focus on Architecture related questions as compared to other semiconductor companies I have interviewed in the past.   Answer Question

    Negotiation

    I did not negotiate, took the offer as I thought it was competitive.


  6. Helpful (2)  

    Digital Design Engineer Interview

    Anonymous Employee in San Jose, CA (US)
    Accepted Offer
    Positive Experience
    Easy Interview

    Application

    I applied online. The process took 2 weeks. I interviewed at Qualcomm (San Jose, CA (US)).

    Interview

    Applied online. Got an email asking if available. Had two rounds of phone interview. Was asked about previous work and projects, no technical questions. Was offered an Intern position and full time at the end of the internship

    Interview Questions


  7. Helpful (1)  

    Digital Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Average Interview

    Application

    I applied online. The process took 2+ weeks. I interviewed at Qualcomm.

    Interview

    Consisted of a phone interview followed by an onsite. Phone interview was pretty basic technical questions and questions related to my previous work. Onsite was a pleasurable experience. I was interviewed by 5 different managers or team leads. All interviews were very technical. HR asked some general questions, such as what's your career goal.

    Interview Questions

    • Asynchronous fifos, critical path timing, formal verification, clock gating, hight vt vs low vt   Answer Question
  8. Helpful (2)  

    Digital Design Engineer Interview

    Anonymous Interview Candidate in San Diego, CA (US)
    No Offer
    Average Interview

    Application

    I applied online. The process took 4+ weeks. I interviewed at Qualcomm (San Diego, CA (US)).

    Interview

    Consisted of a phone interview followed by an onsite. Phone interview was pretty basic technical questions and questions related to my current work. Onsite was a pleasurable experience. I was interviewed by 5 different managers or team leads and one HR. All interviews were very technical and true to team's work. HR was interested in knowing what you know about the company.

    Interview Questions

    • Asynchronous fifos, critical path timing, formal verification, clock gating   Answer Question

  9. Helpful (2)  

    Digital Design Engineer Interview

    Anonymous Interview Candidate in San Diego, CA (US)
    No Offer
    Positive Experience
    Difficult Interview

    Application

    I applied online. The process took 1 day. I interviewed at Qualcomm (San Diego, CA (US)) in April 2012.

    Interview

    Interview was very difficult.

    Interview Questions

    • Which parameters are to be considered to choose value of the bypass capacitor   1 Answer
    • Explain stability of the amplifier,   Answer Question

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