We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced engineer with a passion for solving complex technical challenges and a deep interest in shaping the future of semiconductor design. With a strong background in algorithm development, software engineering, and electronic design automation (EDA) tools, you thrive in collaborative environments where innovation and precision are paramount. You have a proven track record in designing, analyzing, and optimizing algorithms for timing constraint management, and you bring a keen eye for detail to every aspect of your work. Your analytical mindset enables you to break down intricate problems and devise robust, scalable solutions. You are comfortable working with C/C++, scripting languages, and have a foundational understanding of programming paradigms that drive high-performance software. Your curiosity drives you to explore new technologies, and your adaptability allows you to stay ahead in a fast-evolving industry. You are a thoughtful communicator, able to bridge technical and customer perspectives, and you possess the independent judgment necessary to make impactful decisions. Your experience with STA, EDA tool flows, and constraint management gives you unique insights into customer needs, and you are eager to champion their requests and deliver next-generation solutions. Your commitment to excellence and your drive to push boundaries make you an invaluable addition to our R&D team.

What You’ll Be Doing:

• Designing and analyzing algorithms for end-to-end timing constraint management across the Synopsys flow.
• Driving the success and evolution of Synopsys' constraint flow and tools, enhancing product performance and integration.
• Collaborating within a highly skilled engineering team to deliver innovative solutions for static timing analysis (STA) during design and optimization.
• Designing, developing, troubleshooting, and debugging advanced software programs for constraint generation and verification.
• Architecting, developing, and testing constraint management solutions, contributing to the advancement of R&D software development.
• Integrating source code and analyzing integration strategies to ensure seamless functionality within Synopsys products.
• Gathering requirements from stakeholders and executing them according to software specifications.
• Optimizing the development cycle for building integrated PrimeTime (PT)/Timing Constraint Management (TCM) solutions.
• Designing and developing features for high-performance, high-capacity constraint analysis and generation tools.

The Impact You Will Have:

• Accelerate the development of next-generation timing constraint solutions, directly influencing the success of Synopsys’ EDA offerings.
• Enhance the reliability and performance of chip design flows, empowering customers to achieve optimal results.
• Drive innovation by implementing robust algorithms that enable accurate timing constraint management from RTL to gate-level sign-off.
• Contribute to seamless product integration, improving user experience across Synopsys’ suite of design tools.
• Champion key customer requests, ensuring that their needs are met and their feedback shapes future product advancements.
• Support the advancement of design methodologies, positioning Synopsys as a leader in constraint management and STA technology.
• Foster collaboration between engineering, applications, and management teams, strengthening Synopsys’ culture of innovation.

What You’ll Need:

• B.Tech/M.Tech in Computer Science or Electrical Engineering from a reputed institute.
• 8 years of experience with strong foundational knowledge of programming fundamentals, including data structures, sorting, searching algorithms, and numerical methods.
• Ability to read and analyze code in C/C++, with hands-on experience in software development.
• Exceptional debugging skills and proficiency in scripting languages (such as Python, Perl, or TCL).
• Demonstrated analytical and problem-solving skills, with a keen attention to detail.
• Independent judgment in selecting methods and techniques to obtain technical solutions.
• Experience with Synopsys Static Timing Analysis (STA) tools and EDA tool/CAD flow development (preferred).
• Experience with Synopsys Design Constraints (SDC) is a strong plus.

Who You Are:

• Innovative thinker who thrives in a dynamic, fast-paced environment.
• Collaborative team player with excellent communication skills, able to work across functions and with customers.
• Detail-oriented and quality-focused, ensuring robust and reliable solutions.
• Curious and eager to learn, always seeking to explore new technologies and methodologies.
• Self-driven, with a proactive approach to problem-solving and technical challenges.
• Adaptable and resilient, comfortable with evolving priorities and complex project requirements.

The Team You’ll Be A Part Of:

You’ll join the industry-leading Timing Constraint Management (TCM) product engineering team at Synopsys, a diverse group of talented professionals dedicated to advancing constraint generation, verification, and management solutions. The team collaborates closely with customers, application engineers, and management to deliver integrated, high-performance products that shape the future of semiconductor design. Together, you’ll drive innovation and excellence in EDA software, supporting the end-to-end Synopsys flow from RTL design to gate-level implementation and sign-off.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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