Role Proficiency:
Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under minimal supervison from the Lead
Outcomes:
Measures of Outcomes:
Outputs Expected:
Quality of the deliverables:
Timely delivery:
Teamwork:
Innovation & Creativity:
Skill Examples:
Knowledge Examples:
JD: • Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development • Experience with AMD Vivado & Vitis SDK & VItis AI tools. • Experience with C/C++ in developing Embedded FW & scripting automation using Python • Experience with Petalinux build flow , familiarity with Uboot, linux driver changes and FPGA SoC debugging. • Proven ability to work as part of a global team in multiple geographies • B.Tech. in Electronics , Electrical , Computer Science Engineering • Requires 8-10 years of experience in FPGA/RTL & TestBench/ embedded systems architecture • Multi-disciplinary experience, including Firmware, HW, and ASIC/FPGA design PREFERRED: • Knowledge of FPGA Chip to Chip interfacing & AMD FPGAs is an advantage • Knowledge of PCIe Gen4/5/6 technology is an advantage • Previous experience with storage systems, protocols, and NAND flash – strong advantage SKILLS: • Capable of developing wide system view for complex embedded systems • Excellent interpersonal skills • Strong can-do attitude
Fpga Design,Verilog RTL based IP design,System Verilog
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